Fast Simulation Technique for LDPC Code Analysis

摘要

We address the issue of prohibitively high simulation times required for Bit-Error Rate (BER) estimations in digital communication. A simulation study of Low-Density Parity Check (LDPC) decoders used for forward error correction is presented. A novel simulation approach based on Importance Sampling technique is proposed that can be used to accelerate the BER simulations. The major issue in applying Importance Sampling is the choice of the biasing distribution used, which is typically specific to the system under consideration. We present histogram-based analysis, Threshold Method and Envelop Method, to increase simulation speed while not increasing the complexity of implementation. The methods proposed can be extended for any block codes.