ATPG Algorithm for Synchronous Sequential Circuits Based on HGA and Simulation

摘要

An automatic test pattern generation algorithm for synchronous sequential circuit is proposed by integrating symbolic fault simulator in a hybrid genetic algorithm environment. In a two-phase algorithm test length and fault coverage are well optimized. Furthermore, it supports not only Single Time Test Strategy but also test patterns with respect to the Multiple Observation Time Test Strategy. In the hybrid approach of genetic algorithm, suggested in this article efficiently improves the solutions in the population by using domain specific information and recombines good solutions in order to investigate different regions of the solution space. The results of the test problems show that the hybrid methodology improves on previous approaches.