Algorithms for logical control: their description, verification and hardware implementation

摘要

The problems of high-level design of logical control devices are discussed in this paper. Such a design begins with developing some logical control algorithm (LCA) which could be parallel and asynchronous and terminates by getting a proper system of logical equations. To describe LCAs an original language PRALU is proposed, combining some properties of "cause-effect" models with Petri nets; there is suggested also a standard form of PRALU-algorithms - the parallel automaton which unlike the conventional finite automaton can be placed simultaneously into several places, called partial. An efficient reduction algorithm is proposed to check LCAs for correctness, defined as combination of five useful qualities. The problem of partial state assignment is solved to express parallel automata in terms of Boolean variables, minimizing by that their number. For conclusion, a method for PLA implementation of LCAs is described.