STATISTICAL OUTLIER TESTS FOR DETECTING LATENT PHYSICAL DEFECTS IN SEMICONDUCTOR DEVICES AT ELECTRICAL PROBE

摘要

In Semiconductor manufacturing operations, wafers containing from a few hundred to many thousand devices are created in iterative cycles of material deposition, patterning, and selective removal. Before the wafers leave the factory, each individual device on the wafer is electrically tested to verify its functionality in a process know as electrical probe, bin probe, or simply probe. In this process, a vector of electrical measurements on each part is taken and compared to the specification limits for the device. Parts with measurements that fall outside the limits are marked to be discarded later when the wafer is sawn apart. The specification limits for devices are carefully calculated to ensure the best possible containment of devices with physical defects or variation outside the designed process window. In some cases, however, latent physical defects in a device do not have a large enough effect on the measured parameters to clearly distinguish that device from the population of normally functioning devices. In these cases, a more complex approach to identifying latent defects is required to preserve the quality of outgoing product. In this paper, a statistical outlier test based on regression models is employed to detect latent physical defects. Although these defects may have as little as a 3% electrical effect on the primary device outputs, the outlier test is able to achieve over 99% effectiveness against escapes with a false detection rate of less than 14%. Implementation of this outlier test at probe was the enabling factor that allowed this device line to achieve outgoing defectivity levels <100 PPM.