PyHDL: Hardware Scripting with Python

摘要

The Python Hardware Description Language (PyHDL) provides a scripting interface to object-oriented hardware design in C++. PyHDL uses the PamDC and PAM-Blox libraries to generate FPGA circuits. The main advantage of scripting languages is a reduction in development time for high-level designs. Scripting on lower levels, such as the gate level, results in large slowdowns due to the increased complexities involved. We therefore propose a two-step approach: first, use scripting to explore effects of composition andparameterisation; second, convert the scripted designs into compiled components for performance. Our results show that, for small designs, our method offers 5 to 7 times improvement in turnaround time. For a large FIR filter with 90 coefficients, our method offers respectively 216% and 12.5% improvement in turnaround time over purely scripting and purely compiled methods.