A Reversible Version of 4 x 4 bit Array Multiplier With Minimum Gates and Garbage Outputs

摘要

This paper presents the novel design and synthesis of 4x4 bit reversible logic based array multiplier. The proposed reversible circuit has the ability to multiply two 4-bits binary numbers which can be generalized for NXN bit. It is also shown that the proposed design technique generates the reversible binary array multiplier with minimum number of gates as well as the minimum number of garbage outputs.