Automatic Test Generation Algorithms Based on Chaotic Neural Network

摘要

A test generation system based on digital circuit's neural network model is described in this paper. A fault is injected into the neural network and an energy function is constructed with global minima at test vectors. Global minima are determined by chaotic neural networks method employing four different algorithms, and the algorithms are compared in test-time and test-figure. Simulation results on combinational circuits confirm the feasibility of this technique.