Nonbinary Convolutional Encoder for Vector Symbol Decoding on FPGA board

摘要

Convolutional codes are widely used for reliable data communications. Conventionally, the codes use binary symbols because their decoders such as Viterbi decoder or Sequential Decoder usually were designed for binary symbols. In order to develop the system for nonbinary convolutional codes that use the vector symbol decoding algorithm, there is a need for a nonbinary convolutional encoder that works with large symbol size since the typical size of this decoding algorithm is 32 bits/symbol. For ease of implementation, this encoder was developed on an FPGA (Field Programmable Gate Array) board.