The Programmable Logic Implementation Of GPS/GLONASS Clock Synchronization

摘要

A GPS/GLONASS clock synchronization implementation based on programmable logic is presented. The GPS/GLONASS PPS (standard 1 second signal) is regarded as a reference of the whole clock synchronization system that consists of two levels PLL. Both the GPS/GLONASS PPS and OCXO assure the long-term stability and short-term stability of clock signals. All the digital circuit, including digital phase error discriminator. 2S-generating module, phase error detecting and controlling module, can be .built in a programmable logic chip.