Impedance Influence Analysis of Phase-Locked Loops on Three-Phase Grid-Connected Inverters

摘要

For grid-connected inverters, phase-locked loop (PLL) is usually adopted for the injected grid current to achieve phase tracking of the grid voltages, which means the PLL will have an inevitable effect on the output impedance characteristics and the impedance stability of grid-connected inverters. Hence, the harmonic linearization method was firstly used to derive the positive- and negative-sequence output impedance models of the three-phase grid-connected inverter with and without PLLs. ond, two kinds of the commonly used PLL circuits that are synchronous reference frame phase locked loop (SRF-PLL) and dual second order generalized integrator frequency locked loop (DSOGI-FLL) were employed to compare and analyze their frequency characteristics. Finally, the simulation and experimental results were given to verify the impedance models of the grid-connected inverter with different PLLs.