Analysis of Phase-Locked Loop Low-Frequency Stability in Three-Phase Grid-Connected Power Converters Considering Impedance Interactions

摘要

Synchronous reference frame (SRF) phase-locked loop (PLL) is a critical component for the control and grid synchronization of three-phase grid-connected power converters. The PLL behaviors, especially its low-frequency dynamics, influenced by different grid and load impedances as well as operation mode have not been investigated yet, which may not be captured by conventional linear PLL models. In this paper, we propose a state-feedback quasi-static SRF-PLL model, which can identify and quantify the inherent frequency self-synchronization mechanism in the converter control system. This self-synchronization effect is essentially due to the converter interactions with grid impedance and power flow directions. The low-frequency nonlinear behaviors of the PLL under different grid impedance conditions are then analyzed, which forms the framework of evaluating the impacts of the large penetration level of distributed generation units, weak grid, microgrid, and large reactive power consumption in terms of the frequency stability of PLL. Specifically, the PLL behavior of the converter system under islanded condition is investigated to explain the PLL instability issues and the related islanding-detection methods in early publications and industry reports.