Amorphous Silicon Thin-film Transistor Arrays Fabricated by Jet Printing

摘要

Digitally processed, jet-printed etch masks were used to fabricate hydrogenated amorphous silicon thin-film transistor (TFT) matrix-addressing arrays. In place of conventional lithography, wax-based etch masks with a minimum feature size of ～ 40 μm were used to pattern device structures using a multi-ejector piezoelectric printhead. Bottom-gate TFTs with source-drain contacts overlapping the channel were created using a four-mask process. TFTs in a 64x64 pixel array of 300 μm square pixels had Ⅰ-Ⅴ characteristics comparable to photolithographically patterned devices. The average carrier mobility was 0.7 cm~2/V·s for device having a W/L of ～ 0.5. A threshold voltage of ～ 5 V and on/off ratios exceeding 10~8 were measured for a typical device in the array.