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Explaining Propagators for s-DNNF Circuits

机译:解释s-DNNF电路的传播器

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摘要

Smooth decomposable negation normal form (s-DNNF) circuits are a compact form of representing many Boolean functions, that permit linear time satisfiability checking. Given a constraint defined by an s-DNNF circuit, we can create a propagator for the constraint by decomposing the circuit using a Tseitin transformation. But this introduces many additional Boolean variables, and hides the structure of the original s-DNNF. In this paper we show how we can build a propagator that works on the s-DNNF circuit directly, and can be integrated into a lazy-clause generation-based constraint solver. We show that the resulting propagator can efficiently solve problems where s-DNNF circuits are the natural representation of the constraints of the problem, outperforming the decomposition based approach.
机译:平滑的可分解否定范式(s-DNNF)电路是表示许多布尔函数的紧凑形式,允许进行线性时间可满足性检查。给定s-DNNF电路定义的约束,我们可以使用Tseitin变换分解电路,从而为约束创建传播器。但这引入了许多其他布尔变量,并隐藏了原始s-DNNF的结构。在本文中,我们展示了如何构建可直接在s-DNNF电路上工作的传播器,并将其集成到基于延迟子句生成的约束求解器中。我们表明,所得的传播器可以有效地解决问题,其中s-DNNF电路是问题约束的自然表示,其性能优于基于分解的方法。

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