A Design of CMOS-MEMS Micro-mirror Arrays by 0.35-μm 2-Poly-3-Metal Process

摘要

We present a design of multilayer electrostatic bi-stable-state micro-mirror array by using the commercial Advanced Semiconductor Manufacturing Corporation (ASMC) 0.35-|im 2-Poly-3-Metal (2P3M)rncomplementary-metal-oxide-semiconductor (CMOS) process. The multilayer micro mirror is made out of the back-end-of-line of CMOS process. A feasible post-CMOS process is proposed to release the micro mirror array from the substrate after the CMOS process. This micro structure design and the post-CMOS can be transferred to a more advanced CMOS technology such as 0.18-|im l-Poly-6-Metal (1P6M) to integrate the micro-mirror array and the drive circuit vertically. Thus alow cost CMOS-MEMS micro-mirror array with high factor for display application is feasible.The electro-mechanical properties of the mirror are simulated with commercial finite element method software. The pull-in voltage is calculated to be 17.6 V. The simulated intrinsic vibration frequency of the mirror is 311 kHz, which is considerably larger than the working frequency of the micro mirror. The maximum tilting angle is 4.5°. For demonstration purpose, a 4x4 scale array is designed.