Fusing Internet Protocol (IP) receive module at receiving path of open TCP/IP custom Single-Purpose Processor

摘要

In this research work, Internet Protocol (IP ) receive module is proposed to represent the IP layer at receiving path of an open TCP/IP custom single-purpose processor. Main components of IP receive module architecture and Finite-State Machine (FSM) are designed at Register Transfer Level (RTL) using VHDL language. Design and synthesis verification results are depicted using SignalTab logic analyzer.