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Investigating PID Shunting in Polycrystalline Silicon Modules via Multi-Scale, Multi-Technique Characterization

机译:通过多尺度,多技术表征研究多晶硅模块中的PID分流

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Here we present a method for calculating the TCO sheet resistance of complete thin film modules using EL imaging. The method uses the characteristic decay of the junction voltage over the width of a cell stripe to derive four simple analytic equations for the TCO sheet resistance and the internal and contact resistances. Experimentally, only the module dark JV curve, Jsc-Voc curve, and electroluminescence imaging is required. Unlike previous methods, the internal and contact resistances of the modules are accounted for, and the method does not require curve fitting. The TCO sheet resistances of four 10cm × 10cm amorphous silicon modules are calculated and show excellent agreement with the experimentally measured values.
机译:在这里,我们提出一种使用EL成像来计算完整薄膜模块的TCO薄层电阻的方法。该方法利用结电压在单元条带宽度上的特性衰减来得出TCO薄层电阻以及内部和接触电阻的四个简单分析方程式。实验上,仅需要模块暗JV曲线,Jsc-Voc曲线和电致发光成像。与以前的方法不同,考虑了模块的内部和接触电阻,并且该方法不需要曲线拟合。计算出四个10cm×10cm非晶硅模块的TCO薄层电阻,并与实验测量值显示出极好的一致性。

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