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V-band integrated on-chip antenna implemented with a partially reflective surface in standard 0.13-µm BiCMOS technology

机译:V波段集成片上天线,采用标准0.13 µm BiCMOS技术实现部分反射表面

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This paper presents a V-band on-chip triangular planar monopole antenna using IBM 0.13-μm BiCMOS technology. A partially reflective surface (PRS), which is realized with a dual-layered Gangbuster type-4 FSS structure, is exploited to increase the antenna frequency bandwidth, radiation efficiency and gain. The overall size of the antenna, including the PRS, is 0.86 mm. The measured S is smaller than -17 dB from 54 to 66 GHz, while the maximum measured antenna gain is 1.42 dB at 69.5 GHz. The maximum simulated antenna efficiency is 41% at 65 GHz.
机译:本文提出了一种使用IBM0.13-μmBiCMOS技术的V波段片上三角平面单极天线。利用双层的4类Gangbuster FSS结构实现的部分反射表面(PRS)可增加天线的频率带宽,辐射效率和增益。包括PRS在内的天线总尺寸为0.86毫米。从54到66 GHz,测得的S小于-17 dB,而在69.5 GHz时,测得的最大天线增益为1.42 dB。在65 GHz时,最大模拟天线效率为41%。

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