A parallel algorithm for incremental stereo matching on SIMDmachines

摘要

A parallel algorithm for stereo matching that achieves high speedby exploiting the parallel architectures of typical single-instructionmultiple-data (SIMD) processors is presented. The approach is based onseveral existing techniques dealing with the classification andevaluation of matches, the application of ordering constraints, andrelaxation-based matching. The techniques have been integrated andreformulated in terms of parallel execution on a theoretical SIMDmachine. Feasibility is demonstrated by implementation on a commerciallyavailable SIMD machine. An ideal machine, operating at 60 Hz, canaccomplish stereo matching in 1.5 s using 88 machine cycles. On thecommercial machine, stereo matching was achieved in 13.5 s using 404cycles