Schematic and Design Aspects of Interference Immunity in the Design of Analog Devices Electronic Means

机译：模拟器件电子装置设计中抗干扰性的示意图和设计方面

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摘要

The article presents the results of the analysis of noise immunity of analog EM nodes for the example of amplifying devices in integrated design, presents the results of noise immunity analysis, presents its estimates and recommendations on noise-proof design of amplifying nodes, substantiates the expediency of using two fundamentally different characteristics of noise immunity - the effectiveness of protection and noise immunity.

机译：本文以集成设计中的放大设备为例，介绍了模拟EM节点的抗扰性分析结果，介绍了抗扰性分析的结果，提出了对放大节点的抗噪设计的估计和建议，从而证明了其优越性。使用两个根本不同的抗扰度特性-保护效果和抗扰度。

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《IEEE International Conference on Quality Management, Transport and Information Security, Information Technologies》|2018年|646-648|共3页
会议地点 St. Petersburg(RU)
作者
Nikolay N. Grachev; Sergey N. Safonov;
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Department of Electronic Engineering National Research University Higher School of Economics Moscow Russia;

Department of Computer Engineering National Research University Higher School of Economics Moscow Russia;

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关键词
Immunity testing; Circuit stability; Stability analysis; Mathematical model; Feedback loop; Feedback circuits;

机译：免疫测试；电路稳定性；稳定性分析；数学模型;反馈回路;反馈电路;
入库时间 2022-08-26 14:35:19

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Schematic and Design Aspects of Interference Immunity in the Design of Analog Devices Electronic Means

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