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Logic circuit design with gates, LUTs and MUXs oriented to mask faults

机译:具有可掩盖故障的门,LUT和MUX的逻辑电路设计

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A new approach to partially programmable combinational circuit design that allows masking single stuck-at faults of wires is considered. It is supposed that only one wire may be fault. The combinational circuit consists of gates, look-up tables (LUTs) and Multiplexers (MUXs). The approach is based on using incompletely specified Boolean functions for finding sub-circuits from gates that may be covered by LUTs. The method of reprogramming rectifying LUTs is suggested and the condition of a choice of replacing sub-circuits for internal nodes is formulated.
机译:考虑了一种新的部分可编程组合电路设计方法,该方法可以掩盖导线的单个卡死故障。假定只有一根电线可能是故障。组合电路由门,查找表(LUT)和多路复用器(MUX)组成。该方法基于使用不完整指定的布尔函数从可能被LUT覆盖的门中查找子电路。提出了对LUT进行整流的重新编程方法,并提出了替换内部节点子电路的选择条件。

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