A new two-dimensional systolic array for image processing andneural network applications

摘要

Summary form only given. A new type of high-performance VLSIsystolic array is considered that is able to perform two-dimensionalconvolution with kernels sized larger than the physical array ofprocessing elements. This array is particularly well-suited for neuralnetwork image processing algorithms that use large connectedneighborhoods to model the transformations between layers of neurons.This array can also perform the two-dimensional convolution with thesmall kernels that are often used in standard image processing. Inaddition, the array can perform one-dimensional convolution andmatrix-vector multiplication. The interface of the array to externalmemory is designed such that a conventional linear memory architectureis used for accessing and storing data. No variable-length scanconversion shift registers are needed by the systolic array to access animage stored in a conventional raster-scan format. The VLSI array isextensible so that both a single-chip and a multiple-chip architecturesystem can be built