A Processor Architecture for Simultaneously Processing Dataflow and Control-Flow Threads

摘要

A dataflow processor has attractive features for networking applications, such as the natural exploitation of parallelism and instruction-level parallel processing with no context switching overhead. However, a circular pipeline of a pure dataflow processor performs poorly when executing a code with little parallelism. This could lead to a bottleneck to overall performance. To tackle this problem with maintaining the advantages of pure dataflow, this paper proposes a processor architecture that simultaneously processes two orthogonal types of threads in a single pipeline. One kind, denoted "dataflow" is appropriate for the highly parallel parts; the other, "control-flow" is for the parts of the code with little parallelism. Furthermore, the architecture introduces an extended firing control unit, which resolves data hazards dynamically both in the execution of dataflow and control-flow threads. This paper examines (1) the effectiveness of the parallel processing with the dataflow thread, (2) the improved performance in a serial code by introducing the control-flow thread, and (3) the fairness of the scheduling among two kinds of threads. These results lead to the efficient execution of networking applications without interfering two kinds of threads.