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A 82nW chaotic-map true random number generator based on sub-ranging SAR ADC

机译:基于子范围SAR ADC的82nW混沌图真随机数发生器

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An ultra-low power true random number generator (TRNG) based on sub-ranging SAR ADC is proposed. The proposed TRNG shares the coarse-ADC circuit with sub-ranging SAR ADC for area reduction. The shared coarse-ADC not only plays the role of discrete-time chaotic circuit or TRNG's entropy source but also reduces overall SAR ADC energy consumption by selectively activating the fine-SAR ADC. Also, the proposed dynamic residue amplifier and adaptive-reset comparator generate chaotic map with low power consumption. TRNG core occupies 0.0045mm2 in 0.18μm CMOS technology and consumes 82nW at 270kbps throughput with 0.6V supply. The proposed TRNG passes all NIST tests and it achieves a state-of-the-art FOM of 0.3pJ/bit.
机译:提出了一种基于子范围SAR ADC的超低功耗真随机数发生器(TRNG)。拟议的TRNG与SAR ADC共用了粗ADC电路,以减小面积。共享的粗ADC不仅扮演离散时间混沌电路或TRNG的熵源的角色,而且还通过选择性地激活精细SAR ADC来降低SAR ADC的总体能耗。而且,所提出的动态余数放大器和自适应复位比较器生成具有低功耗的混沌图。 TRNG内核在0.18μmCMOS技术中占地0.0045mm2,在0.6V电源下以270kbps的吞吐量消耗82nW。拟议的TRNG通过了所有NIST测试,并实现了0.3pJ / bit的最新FOM。

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