3D passive integrated capacitors towards even higher integration

摘要

IPDIA is involved in Silicon based 3D-IPD advanced technology. 3D high-density capacitor is at the forefront ofrnIPDIA “PICS” (Passive Integrated Connective Substrate) development program. First process generation with 25nF/mm2rnand second generation reaching 80nF/mm2 have been in production for several years. The third generation with multiplernmetal-insulator-metal (MIM) layer stacks in 3D structures is reaching 250nF/mm2 and is being qualified for massrnproduction. Intrinsic low parasitic elements of these capacitors (low ESR and ESL) make it very attractive for DCrndecoupling and very competitive with the ceramic technology.rnTo enable even higher integration, development activities are now focused on the next generations of high-densityrncapacitors targeting ambitious 1μF/mm2. Increase of the capacitor density while keeping an acceptable breakdown voltagernis challenging and requires the integration of high-k materials and studies for maximizing the 3D silicon surface.