Design and fabrication concepts for a 1024 X 1024 pixel IR scene projector array

摘要

We are currently undertaking a design and development phase for the 1024 X 1024 complexity level of infra-red scene projectors based on the emitter resistor array principle. Our approach is based as for previous complexities, on commercially available CMOS with the addition of a custom suspended resistor pixel technology applied monolithically in our own facility. We have adopted the philosophy of continuing to develop the emitter pixel technology, whilst investigating CMOS design concepts, but delaying the detail-design and procurement of the CMOS until a firm commitment to build emerges, so as to allow maximum progress in the CMOS technologies available. We have demonstrated that suitable high-specification suspended resistor pixels can be built over a suitably large area, and conclude that at present a second or possibly third generation analog CMOS circuit would be used, but within the near future, an all-digital fourth generation device will be feasible.