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A CMOS 25.3 ppm°/C bandgap voltage reference using self-cascode composite transistor

机译:使用自级联复合晶体管的CMOS 25.3 ppm°/ C带隙基准电压源

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Voltage reference circuits, presented in battery-operated portable equipments, should be able to be designed using standard digital CMOS process and present low-power operation. This work presents a low-power CMOS Bandgap voltage reference that uses self-cascode composite transistors, only one resistor and none of the BJT''s from the device library. The output voltage is nearly the silicon bandgap voltage and its temperature coefficient is typically 25.3 ppm/°C in the temperature range of -40 to 85°C, while consuming a supply current of 25 μA. The circuit was designed using thick oxide transistors from a 130 nm CMOS process technology and the layout area is 100 μm × 100 μm.
机译:在电池供电的便携式设备中提供的参考电压电路应该能够使用标准的数字CMOS工艺进行设计,并具有低功耗工作能力。这项工作提出了一种低功耗CMOS带隙基准电压源,该基准电压源使用自级联复合晶体管,仅一个电阻器,而器件库中没有一个BJT。输出电压几乎等于硅带隙电压,在-40至85°C的温度范围内,其温度系数通常为25.3 ppm /°C,同时消耗25μA的电源电流。该电路是使用来自130 nm CMOS工艺技术的厚氧化物晶体管设计的,其布局面积为100μm×100μm。

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