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Low Silicon and SiGe Loss in High Dose Implant Resist Strip

机译:高剂量植入电阻条中的低硅和SiGe损失

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摘要

The loss of both silicon and silicon germanium in resist strip process has attracted much attention for generic device development. Such loss mainly stems from the substrate re-oxidation during strip. In this paper, we focus on the high-dose implant resist strip to investigate the re-oxidation of substrate Si and SiGe without compromising the removal capabilities of photoresist (PR) and residue. Besides, the impact of ashing gas ratio on SiN offset spacer critical dimension (CD) is also addressed. Specifically, we studied the substrate re-oxidation performance under various ash process parameters such as pressure, gas ratio, pin position, process time in crust and over-ash (OA) steps. Aside from the re-oxidation effect, we also compared the defect removal capabilities with the above ashing conditions and the dependence of SiN offset spacer CD on ash gas ratio. Results indicate A) The high pressure in preheat step coupled with the low pressure in main-step can effectively preclude Si/SiGe loss. B) For SiGe substrate, the lower ratio of O2/forming gas (FG) exhibits the different impacts between N-MOS and P-MOS implant condition. C) Less OA time brings to better performance for residue removal. D) Continuous offset spacer CD shrink is noticed in each step of lightly doped drain (LDD) loop. The optimized strip scheme delivers not only a residue-free process with the minimum substrate loss but also the improved device performance on both N-MOS and P-MOS.
机译:抗蚀剂剥离工艺中硅和硅锗的损失已引起通用器件开发的广泛关注。这种损失主要源于剥离过程中底物的再氧化。在本文中,我们专注于高剂量注入抗蚀剂条,以研究衬底Si和SiGe的再氧化,而不会损害光刻胶(PR)和残留物的去除能力。此外,还解决了灰化气体比例对SiN补偿间隔物临界尺寸(CD)的影响。具体来说,我们研究了在各种灰分工艺参数(例如压力,气体比率,销钉位置,结皮中的处理时间和高灰分(OA)步骤)下的基材再氧化性能。除了再氧化作用外,我们还比较了上述灰化条件下的缺陷去除能力以及SiN补偿间隔片CD对灰气比的依赖性。结果表明:A)预热步骤中的高压加上主步骤中的低压可以有效地防止Si / SiGe的损失。 B)对于SiGe衬底,较低的O2 /形成气体(FG)比例在N-MOS和P-MOS注入条件之间表现出不同的影响。 C)更少的OA时间带来更好的残留去除性能。 D)在轻掺杂漏极(LDD)环路的每个步骤中都发现连续偏移垫片CD收缩。优化的剥离方案不仅提供了无残留工艺,最小的基板损耗,而且还提高了N-MOS和P-MOS的器件性能。

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  • 会议地点 Shanghai(CN);Shanghai(CN)
  • 作者单位

    Semiconductor Manufacturing International Corporation, No. 18 Zhang Jiang Rd., Pudong New Area, Shanghai, 201203, P.R.China;

    Semiconductor Manufacturing International Corporation, No. 18 Zhang Jiang Rd., Pudong New Area, Shanghai, 201203, P.R.China;

    Semiconductor Manufacturing International Corporation, No. 18 Zhang Jiang Rd., Pudong New Area, Shanghai, 201203, P.R.China;

    Semiconductor Manufacturing International Corporation, No. 18 Zhang Jiang Rd., Pudong New Area, Shanghai, 201203, P.R.China;

    Semiconductor Manufacturing International Corporation, No. 18 Zhang Jiang Rd., Pudong New Area, Shanghai, 201203, P.R.China;

    Semiconductor Manufacturing International Corporation, No. 18 Zhang Jiang Rd., Pudong New Area, Shanghai, 201203, P.R.China;

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  • 正文语种 eng
  • 中图分类 材料;
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