A CMOS switched capacitor implementation of the Mihalas-Niebur neuron

摘要

The Mihalas-Niebur neural model is a generalized model of the leaky integrate-and-fire neuron with adaptive threshold. It has been shown in simulation to be capable of producing most of the known spiking and bursting patterns of cortical neurons [1]. We present results from the first circuit implementation of the model with six spiking patterns observed in biological regular-spiking, fast-spiking and low-threshold spiking inhibitory neurons. The circuit was implemented in a 0.5um CMOS process occupying an area of 277um by 177um.