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Arithmetic Circuits Combining Residue and Signed-Digit Representations

机译:残差和符号数字表示相结合的算术电路

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This paper discusses the use of signed-digit representations in the implementation of fast and efficient residue-arithmetic units. Improvements to existing signed-digit modulo adders and multipliers are suggested and new converters for the residue signed-digit number system are described for the moduli {2~n -1, 2~n, 2~n + 1} . By extending an existing efficient signed-digit adder design to handle modulo operations, we are able to implement high performance modulo addition. The hardware complexity of signed-digit modulo multipliers is reduced by using a more efficient algorithm for calculating partial products. Finally, the novel converters presented makes it possible to integrate this residue signed-digit number system with conventional binary circuits.
机译:本文讨论了在快速有效的残差算术单元的实现中使用数字符号表示形式。建议对现有的符号数字模加法器和乘法器进行改进,并针对模数{2〜n -1,2〜n,2〜n + 1}描述用于残差符号数字系统的新转换器。通过扩展现有的有效符号数字加法器设计以处理模运算,我们能够实现高性能的模加法。通过使用更高效的算法来计算部分乘积,可以减少有符号数字模乘法器的硬件复杂性。最后,提出的新型转换器使该残差符号数字系统与常规二进制电路集成成为可能。

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