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Single-photon Detectors Based on InP Avalanche Diodes: Status and Prospects

机译:基于InP雪崩二极管的单光子探测器的现状与展望

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We report on progress in improving fundamental properties of InP-based single photon avalanche diodes (SPADs) and recent trends for overcoming dominant performance limitations. Through experimental and modeling work focused on the trade-off between dark count rate (DCR) and photon detection efficiency (PDE), we identify the key mechanisms responsible for DCR over a range of operating temperatures and excess bias voltages. This work provides a detailed description of temperature- and bias-dependent DCR thermal activation energy E_a(T,V), including the crossover from low E_a for trap-assisted tunneling at temperatures below ~230 K to larger E_a for thermal generation at temperatures approaching room temperature. By applying these findings to new device design and fabrication, the fundamental tradeoff between PDE and DCR for InP/InGaAs SPADs designed for 1.55 μm photon detection has been managed so that for PDE ~ 20%, devices routinely exhibit DCR values of a few kHz, while "hero" devices demonstrate that it is possible to achieve sub-kHz DCR performance at temperatures readily accessible using thermoelectric coolers. However, important limitations remain, particularly with respect to maximum count rates. Strategies adopted recently to circumvent some of these present limitations include new circuit-based solutions involving high-speed very short-duration gating as well as new monolithic chip-level concepts for obtaining improved performance through avalanche self-quenching. We discuss these two approaches, and we describe recent results from devices with monolithically integrated quench resistors that achieve rapid self-quenching, accompanied by evidence for a partial discharge of the detector capacitance leading to charge flows as low as ~3 × 10~5 carriers associated with each avalanche event.
机译:我们报告了在改善基于InP的单光子雪崩二极管(SPAD)的基本性能方面的进展以及克服主要性能限制的最新趋势。通过侧重于暗计数率(DCR)与光子检测效率(PDE)之间折衷的实验和建模工作,我们确定了在一定工作温度范围内和过量偏置电压下负责DCR的关键机制。这项工作提供了与温度和偏置有关的DCR热活化能E_a(T,V)的详细描述,包括从低E_a到约230 K以下温度下的陷阱辅助隧穿到更大的E_a的跨界,从而在温度接近室内温度。通过将这些发现应用于新的器件设计和制造,已设计出用于1.55μm光子检测的InP / InGaAs SPAD,PDE和DCR之间的基本权衡得到了解决,因此对于PDE〜20%的器件,通常显示出几kHz的DCR值,而“英雄”设备展示了在使用热电冷却器容易达到的温度下可以实现低于kHz的DCR性能。但是,仍然存在重要的限制,特别是在最大计数率方面。最近采用的规避某些当前局限性的策略包括基于电路的新解决方案,其中涉及高速超短时门控,以及通过雪崩自淬火获得更高性能的新型单芯片级概念。我们讨论了这两种方法,并描述了具有单片集成淬灭电阻器的器件的最新结果,这些器件实现了快速的自猝灭,并伴随着检测器电容的局部放电,从而导致电荷流低至〜3×10〜5个载流子与每个雪崩事件相关联。

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