Electrical Failure Analysis and Characterization of Leakage Paths Leading to Single Cell Failures in 128Mbit SDRAMs

摘要

A common failure signature in dynamic random access memories (DRAMs) is the single cell failure. The charge is lost and thereby the information stored in trench capacitors can be destroyed by high resistive leakage paths. The nature of the leakage path determines the properties of the failure such as temperature-, voltage- and timing-dependencies and its stability. In this study, high resistive leakage paths were investigated and delimited from classical shorts by estimating the order of magnitude of the leakage current and by comparison to a simple resistive leakage path. Such an investigation is the basis for a defect-based test approach that leads to multi-parameter tests . An introduction to the problem is given in the first section, while the second section deals with the characterization of the defects in two case studies. A short summary is given in the end.