Department of Electrical and Computer Engineering, University of California San Diego;
Department of Electrical and Computer Engineering, University of California San Diego;
Department of Electrical and Computer Engineering, University of California San Diego;
Department of Electrical and Computer Engineering, University of California San Diego;
Logic gates; Servers; Machine learning; Protocols; Field programmable gate arrays; Computer architecture; Hardware;
机译:ReDCrypt:使用FPGA在云中实时保留隐私保护的深度学习推理
机译:云服务器中私钥/公钥组合的隐私保护
机译:基于第三方加密服务器的数据加密新技术,可在云环境中维护隐私保护
机译:MaxElerator:FPGA加速器,隐私保留云服务器上的乘法累积(Mac)
机译:在FPGA中评估新的乘法和乘法累加结构。
机译:用于多云辅助网络物理系统的隐私保留代理ABE计划
机译:LSTM经常性神经网络的云服务器导向FPGA加速器