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Extensive Evaluation of Programming Models and ISAs Impact on Multicore So Error Reliability

机译:编程模型和ISA对多核So错误可靠性的广泛评估

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To take advantage of the performance enhancements provided by multicore processors, new instruction set architectures (ISAs) and parallel programming libraries have been investigated across multiple industrial segments. This paper investigates the impact of parallelization libraries and distinct ISAs on the soft error reliability of two multicore ARM processor models (i.e., Cortex-A9 and Cortex-A72), running Linux Kernel and benchmarks with up to 87 billion instructions. An extensive soft error evaluation with more than 1.2 million simulation hours, considering ARMv7 and ARMv8 ISAs and the NAS Parallel Benchmark (NPB) suite is presented.
机译:为了利用多核处理器提供的性能增强,已经跨多个工业领域研究了新的指令集体系结构(ISA)和并行编程库。本文研究了并行化库和不同的ISA对两个多核ARM处理器模型(即Cortex-A9和Cortex-A72)的软错误可靠性的影响,该模型运行Linux内核和具有多达870亿条指令的基准测试。结合ARMv7和ARMv8 ISA和NAS并行基准(NPB)套件,提出了具有120万多个模拟小时的广泛软错误评估。

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