Dept. of Electronics Engineering. Yeshwantrao Chavan College of Engineering, Nagpur, India;
Dept. of Electronics Engineering. Yeshwantrao Chavan College of Engineering, Nagpur, India;
Dept. of Electronics Engineering. Yeshwantrao Chavan College of Engineering, Nagpur, India;
Dept. of Computer Technology. Yeshwantrao Chavan College of Engineering, Nagpur, India;
Dept., of Electrical Engineering, San Jose State University, California-95192;
Test pattern generators; Clocks; Switches; Power demand; Built-in self-test; Linear feedback shift registers;
机译:基于低过渡LFSR的低功耗测试码型发生器设计,用于高故障覆盖率分析
机译:基于低过渡LFSR的低功耗测试码型发生器设计,用于高故障覆盖率分析
机译:使用故障覆盖电路的低过渡低功耗测试模式发生器的Vlsi设计
机译:低转换LFSR的低功耗测试模式发生器的设计与实现
机译:超低功耗模式和序列解码器的设计与实现。
机译:女孩动力营养计划:由营养计划的形成性评估专业主题由低收入和中等收入国家的青少年共同设计和实施
机译:基于低过渡LFSR的低功耗测试码型发生器设计,用于高故障覆盖率分析