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A survey on embedded reconfigurable architectures

机译:嵌入式可重构体系结构调查

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摘要

Application specific integrated circuits are used to provide real-time performance of handheld devices within the compact physical size and low energy dissipation. However, these circuits are inflexible for any modification like redesign and refabrication. Reconfigurable architectures are promising alternative for conventional computing devices such as application-specific integrated circuits. It provides high-level flexibility to adapt the applications through dynamic hardware customization even after fabrication. A reconfigurable computing system design considers the peculiarities of the targeted application domain along with architectural issues like dynamic reconfiguration, partial reconfiguration, hardware/software co-design and context management. A brief survey has been carried out to understand the concepts and applications of CGRA, FPGA, SoC, NoC, MPSoC, dynamic partial reconfiguration, hardware/software co-design, design-space exploration, multi-objective optimization, genetic algorithm and reconfigurable computing on wireless communications. This paper deals with the survey on modeling, design, implementation and evaluation of coarse-grained dynamically reconfigurable processor architectures targeting the real-time embedded computing domain.
机译:专用集成电路用于在紧凑的物理尺寸和低能耗的情况下提供手持设备的实时性能。然而,这些电路对于诸如重新设计和再制造的任何修改都是不灵活的。对于诸如专用集成电路之类的常规计算设备,可重构体系结构是有希望的替代方案。它提供了高度的灵活性,即使在制造后也可以通过动态硬件定制来适应应用程序。可重配置的计算系统设计考虑了目标应用程序域的特殊性以及诸如动态重配置,部分重配置,硬件/软件协同设计和上下文管理之类的体系结构问题。进行了简短的调查,以了解CGRA,FPGA,SoC,NoC,MPSoC,动态部分重配置,硬件/软件协同设计,设计空间探索,多目标优化,遗传算法和可重构计算的概念和应用在无线通信上。本文针对针对实时嵌入式计算域的粗粒度动态可重配置处理器体系结构的建模,设计,实现和评估进行了调查。

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