A new characterization technique for extracting parasitic inductances of fast switching power MOSFETs using two-port vector network analyzer

摘要

This paper discusses a new technique to accurately characterize parasitic inductances of discrete fast switching MOSFETs based on S-parameters measurement using two-port vector network analyzer. The method is validated through case studies of 1200V SiC MOSFET in TO-247 and 30V silicon trench MOSFET in SO-8 package.