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Digital multi-level closed loop design for wideband envelope tracking systems

机译:宽带包络跟踪系统的数字多级闭环设计

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In this paper, we present a closed loop multilevel envelope tracker (ET) based on multiple high bandwidth (BW) digital low dropout (DLDO) voltage regulators, tested on WiFi 802.11ac 80 MHz signal in high level simulation platform. The multilevel concept is based on high speed switching between different voltage levels. The suggested architecture can cope with very high BW without an efficiency penalty and does not require any external inductor. Despite the existing highly non-linear power amplifier (PA) in our system, this architecture provides a solution in terms of band edge (BE) mask limitation, with efficiency of 85% for the ET driver, when using PA output power of 19dBm, and reaching 40% efficiency boost based on 28nm simulations. Most of the components are fully digital and synthesizable, which has a big advantage compared to analog alternatives in efficiency, noise and size, improve time-to-market and of course assures robustness and flexibility. The paper presents the main challenges of this topology, which are the plant non-linearity and DLDO branch transition, and are solved using a shared digital controller, and adaptive control.
机译:在本文中,我们提出了一种基于多个高带宽(BW)数字低压降(DLDO)稳压器的闭环多级包络跟踪器(ET),在高级仿真平台上对WiFi 802.11ac 80 MHz信号进行了测试。多电平概念基于不同电压电平之间的高速切换。所建议的架构可以应对非常高的带宽,而不会降低效率,并且不需要任何外部电感器。尽管我们的系统中已经存在高度非线性的功率放大器(PA),但该体系结构仍然可以解决频带边缘(BE)掩码限制的问题,当使用19dBm的PA输出功率时,ET驱动器的效率为85%,并基于28nm模拟达到40%的效率提升。大多数组件都是全数字的且可合成的,与模拟替代产品相比,它在效率,噪声和尺寸方面具有很大优势,缩短了产品上市时间,当然还确保了鲁棒性和灵活性。本文介绍了这种拓扑结构的主要挑战,即工厂非线性和DLDO分支转移,并使用共享数字控制器和自适应控制解决了这些挑战。

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