College of EME, National University of Sciences and Technology (NUST), Rawalpindi, Pakistan;
College of EME, National University of Sciences and Technology (NUST), Rawalpindi, Pakistan;
Department of Electrical and Computer Engineering and Institute for Systems Research, University of Maryland, College Park, USA;
Department of Electrical and Computer Engineering and Institute for Systems Research, University of Maryland, College Park, USA;
Logic gates; Complexity theory; Benchmark testing; Layout; Multiplexing; Security; Observability;
机译:基于逻辑含义的数字电路混淆方法
机译:使用基于顺序触发的基于模式的设计对集成电路进行基于键的动态功能混淆
机译:候选人欺骗性的混淆和所有电路的功能加密
机译:使用可观察性的数字电路功能混淆不关心条件
机译:通过模糊实现安全性:使用无关条件的数字集成电路布局混淆
机译:用于传感器调节系统的数字可编程模拟电路
机译:考虑电路可观察性并不关心CNF的可满足性