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Improved QFN Reliability by flank tin plating process after singulation

机译:分割后通过侧面镀锡工艺提高了QFN可靠性

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摘要

The process of singulating IC packages such as Quad Flat Pack No-Lead (QFNs) by either a sawing or punching operation results in exposed copper on the sidewalls. This exposed copper surface can oxidize leading to poor or no solder wetting up the sidewall during the assembly operation. The consequence of this oxidized copper surface is either incomplete or no solder fillet formation during the PCB mounting operation resulting in solder joint reliability concerns. Currently, JEDEC and IPC assembly standards do not specify a toe fillet for assembly. However, several component manufacturers have requested a toe fillet solderability process which would improve current QFN reliability by ensuring toe fillet solder coverage. A process whereby tin is plated on the copper sidewall of the QFN after singulation has been developed to improve toe fillet solderability. Several assembly studies have been conducted which demonstrate improved QFN reliability due to the use of this toe fillet solderability process. The plating process, toe fillet inspection and improved QFN reliability after assembly due to the use of this toe fillet solderability is described.
机译:通过锯切或冲压操作将诸如四方扁平无铅封装(QFN)之类的IC封装单片化的过程会导致侧壁上裸露的铜。裸露的铜表面可能会氧化,从而导致在组装过程中不良或没有焊料润湿侧壁。这种氧化的铜表面的结果是在PCB安装操作过程中不完整或没有形成焊脚,导致了对焊点可靠性的担忧。当前,JEDEC和IPC组装标准尚未指定用于组装的脚趾圆角。但是,一些组件制造商已经要求采用脚趾可焊性工艺,以确保脚趾焊锡覆盖率,从而提高当前的QFN可靠性。已经开发出一种在切单之后将锡镀在QFN的铜侧壁上的工艺,以改善脚趾的可焊性。已经进行了几项组装研究,这些研究表明由于使用了这种趾压角可焊性工艺,QFN可靠性得到了改善。描述了电镀工艺,脚趾角检查以及由于使用了该脚趾角可焊性而在组装后提高了QFN可靠性。

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