首页> 外文会议>2014 IEEE Fifth International Conference on Communications and Electronics >Parallel Random Access Memory in a shared memory architecture
【24h】

Parallel Random Access Memory in a shared memory architecture

机译:共享内存架构中的并行随机存取存储器

获取原文
获取原文并翻译 | 示例

摘要

Parallel algorithms can significantly speed up computing performance. However, parallel architecture often needs shared-memories for concurrent access. Conventionally, parallel memories are constructed as space-multiplexed memories with many memory chips connected in parallel. This architecture normally requires a large number of interconnects with potentially large routing delay and consumes massive area. This proposal develops a new memory component called Parallel Random Access Memory (P-RAM) with four identical parallel ports. This component is designed using VHDL hardware description language and emulated on Cyclone II FPGA. The P-RAM is not a conventional RAM memory since its four ports can be read and write concurrently. It can be used for many purposes such as shared memory for multiple processors in a parallel model.
机译:并行算法可以大大提高计算性能。但是,并行架构通常需要共享内存来进行并发访问。通常,并行存储器被构造为空间并行存储器,其中许多存储器芯片并行连接。这种体系结构通常需要大量的互连,而布线的延迟可能会很大,并且会占用大量的面积。该提议开发了一种具有四个相同并行端口的称为并行随机存取存储器(P-RAM)的新存储组件。该组件是使用VHDL硬件描述语言设计的,并在Cyclone II FPGA上进行了仿真。 P-RAM不是常规的RAM存储器,因为它的四个端口可以同时读写。它可以用于许多目的,例如并行模型中多个处理器的共享内存。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号