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FPGA design for reflective memory network communication technology

机译:反射存储网络通信技术的FPGA设计

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摘要

On the hardware platform of Distributed Real-Time Simulation, a communication module based on reflective memory network was realized in FPGA. The module, as an infrastructure, could be integrated with others seamlessly. Information stream inside the module was analyzed. Following the "Store and Forward with FIFO" rules, hardware circuits were well designed, including Host Logic, Memory Logic, and Net Logic. In addition, kernel data structures were defined, and 64bits/32bits PCI bus compatibility problem was mainly solved. Finally, through the delay analysis of the design and experiments in field, the communication delay between two neighboring nodes reaches microsecond level.
机译:在分布式实时仿真的硬件平台上,利用FPGA实现了基于反射存储网络的通信模块。该模块作为基础架构,可以与其他模块无缝集成。分析了模块内部的信息流。遵循“使用FIFO存储和转发”规则,对硬件电路进行了精心设计,包括主机逻辑,内存逻辑和网络逻辑。此外,还定义了内核数据结构,主要解决了64位/ 32位PCI总线兼容性问题。最后,通过对设计和现场实验的时延分析,两个相邻节点之间的通信时延达到了微秒级。

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