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Digital closed loop design for wideband envelope tracking system

机译:宽带包络跟踪系统的数字闭环设计

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摘要

In this paper, we will show two methods of digital closed loop envelope tracking systems for high bandwidth communication systems, tested on wifi 80 MHz signals (11ac) in high level simulation platform (matlab & simulink). We will present the challenges of high frequency digital DC2DC converter for envelope tracking (ET) as load modulation wide digital controller loop and noise and saturation in the loop, and multilevel ET based on several high BW digital low dropout (DLDO) voltage regulators, and examine the differences in terms of the challenges and coping mechanisms each one holds. We will show that although the existing highly non-linear PA in our system, both architectures provide the solution in terms of band edge (BE) mask limitation, with efficiency of ~80% for the ET full driver. All components in both architectures are fully digital and synthesizable, which has a big advantage compared to analog options in efficiency noise and size, and of course assures robustness and flexibility.
机译:在本文中,我们将展示两种用于高带宽通信系统的数字闭环包络跟踪系统的方法,这些方法在高级仿真平台(matlab&simulink)上在wifi 80 MHz信号(11ac)上进行了测试。我们将介绍用于包络跟踪(ET)的高频数字DC2DC转换器的挑战,包括负载调制宽数字控制器环路,环路中的噪声和饱和度以及基于几个高BW数字低压降(DLDO)稳压器的多级ET,以及从每个人面临的挑战和应对机制的角度研究差异。我们将证明,尽管我们系统中已经存在高度非线性的PA,但两种体系结构都可提供频带边缘(BE)掩模限制方面的解决方案,而ET全驱动器的效率约为80%。两种架构中的所有组件都是全数字的且可合成的,与模拟选项相比,它在效率噪声和尺寸方面具有很大优势,并且当然可以确保鲁棒性和灵活性。

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