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A heuristic algorithm for via minimization in VLSI channel routing

机译:VLSI通道路由中用于最小化的启发式算法

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We know that via minimization is a very important problem in channel routing. The main aim of via minimization is to improve the circuit performance and productivity, to reduce the completion rate of routing and also to fabricate integrated circuit correctly. In this paper, we are using a heuristic algorithm for solving via minimization problem in VLSI channel routing with movable terminal. Here we concentrate on how fast we find out maximum independent set from the net intersection graph. That is why here we use heuristic technique to find the maximum independent set of a graph with polynomial time complexity. Next, we show how to use that maximum independent set to solve the via minimization problem using an example. Then, we show the experimental results and hardcopy solutions of some channel instances to prove the efficiency of this approach.
机译:我们知道在通道路由中,最小化是一个非常重要的问题。通孔最小化的主要目的是提高电路性能和生产率,降低布线的完成率,并正确地制造集成电路。在本文中,我们使用启发式算法来解决带有可移动终端的VLSI通道路由中的最小化问题。在这里,我们专注于从网络相交图中找出最大独立集的速度。这就是为什么我们在这里使用启发式技术找到具有多项式时间复杂度的图的最大独立集的原因。接下来,我们通过一个示例演示如何使用最大独立集来解决过孔最小化问题。然后,我们展示了一些通道实例的实验结果和硬拷贝解决方案,以证明该方法的有效性。

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