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A 6 GHz digital receiver using COTS prototyping boards

机译:使用COTS原型板的6 GHz数字接收器

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We have designed and tested a digital receiver suitable for the reception of 6 GHz instantaneous baseband signals. It is based on a Tektronix TADC-1000 12.5-GS/s 8-bit digitiser module, a Tektronix TIPA-3100 HAPS Interposer board and a Synopsys HAPS62-Virtex6 Prototyping Motherboard. This motherboard is also employed for filtering and signal processing. The ADC module uses an external clock from the interposer board and can accept a range of input clock frequencies between 1.6 and 3.125 GHz, resulting in sample rates of between 8 and 12.5 GS/s in single-channel mode. The external clock and digital data are supplied to and processed via the HAPS62 board. A 2048-channel weighted overlap-add (WOLA) and FFT structure separate the input signal into approximately 5-MHz sub-bands to allow subsequent high-resolution processing to obtain continuous spectral information over the input bandwidth. This system meets present-day demands on high-resolution wideband digital back-ends for RF spectrum monitoring. This technology could be part of the next generation wideband signal intercept systems for the future detection, classification and location of modern complex RF signals.
机译:我们已经设计并测试了适合接收6 GHz瞬时基带信号的数字接收器。它基于Tektronix TADC-1000 12.5-GS / s 8位数字转换器模块,Tektronix TIPA-3100 HAPS插入器板和Synopsys HAPS62-Virtex6原型主板。该主板还用于滤波和信号处理。 ADC模块使用来自插入器板的外部时钟,并且可以接受1.6到3.125 GHz之间的输入时钟频率范围,从而在单通道模式下产生8到12.5 GS / s的采样率。外部时钟和数字数据通过HAPS62板提供并处理。 2048通道加权重叠相加(WOLA)和FFT结构将输入信号分成大约5MHz的子带,以允许后续的高分辨率处理在输入带宽上获得连续的频谱信息。该系统可以满足当今对用于RF频谱监视的高分辨率宽带数字后端的需求。该技术可能是下一代宽带信号拦截系统的一部分,用于将来对现代复杂RF信号的检测,分类和定位。

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