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Stochastic neuron design using conductive bridge RAM

机译:使用导电桥RAM的随机神经元设计

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We present an original methodology to design hybrid neuron circuits (CMOS + non volatile resistive memory) with stochastic firing behaviour. In order to implement stochastic firing, we exploit unavoidable intrinsic variability occurring in emerging non-volatile resistive memory technologies. In particular, we use the variability on the ‘time-to-set’ (tset) and ‘off-state resistance’ (ROff) of Ag/GeS2 based Conductive Bridge (CBRAM) memory devices. We propose a circuit and a novel self-programming technique for using CBRAM devices inside standard Integrate and Fire neurons. Our proposed solution is extremely compact with an additional area overhead of 1R-3T. The additional energy consumption to implement stochasticity in Integrate and Fire neurons is dominated by the CBRAM set-process. These results highlight the benefits of novel non memory technologies, whose impact may go far beyond traditional memory markets.
机译:我们提出了一种原始的方法来设计具有随机激发行为的混合神经元电路(CMOS +非易失性电阻性存储器)。为了实现随机触发,我们利用了新兴的非易失性电阻式存储技术中不可避免的固有可变性。特别是,我们使用Ag / GeS <'的设定时间(t set )和'断态电阻'(R Off )的可变性<基于inf> 2 的导电桥(CBRAM)存储设备。我们提出了一种电路和一种新颖的自编程技术,用于在标准Integrate和Fire神经元内部使用CBRAM器件。我们提出的解决方案非常紧凑,额外的区域开销为1R-3T。 CBRAM设置过程决定了在Integrate和Fire神经元中实现随机性的额外能耗。这些结果凸显了新型非存储器技术的好处,其影响可能远远超出传统存储器市场。

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