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A PCM-based TCAM cell using NDR

机译:使用NDR的基于PCM的TCAM单元

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摘要

This paper presents a new design of a ternary content addressable memory (TCAM) cell. This design exploits two emerging technology devices: a phase change memory (PCM) as storage element and a negative differential resistance (NDR) device as control element. The PCM stores a multi-value resistance to account for the ternary nature of the equality function to be performed in a TCAM. The CMOS-NDR device uses a macroscopic model made of three transistors to exhibit a very high peak-to-valley current ratio, a single symmetric peak and excellent switching speed. The CMOS-NDR device is embedded in the cell such that specific operational points are placed on the I-V curve for generating the match/mismatch outcome. A common-source amplifier with source degeneration is used for decoding the PCM. Extensive simulation results at nanoscale feature sizes (45, 32 and 22 nm) are presented. These results show that the proposed TCAM cell outperforms a previously presented non-volatile TCAM cell based on MTJ in terms of power dissipation and power delay product (PDP).
机译:本文提出了一种三元内容可寻址存储器(TCAM)单元的新设计。该设计利用了两种新兴技术设备:相变存储器(PCM)作为存储元件和负微分电阻(NDR)设备作为控制元件。 PCM存储一个多值电阻,以说明要在TCAM中执行的相等函数的三进制性质。 CMOS-NDR器件使用由三个晶体管组成的宏观模型来显示非常高的峰谷电流比,单个对称峰和出色的开关速度。 CMOS-NDR器件嵌入到单元中,因此特定的工作点位于I-V曲线上,以生成匹配/不匹配结果。具有源负反馈的共源放大器用于解码PCM。给出了纳米级特征尺寸(45、32和22 nm)的广泛仿真结果。这些结果表明,在功耗和功率延迟乘积(PDP)方面,拟议的TCAM单元优于先前提出的基于MTJ的非易失性TCAM单元。

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