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Digital phase locked loop design using discrete time sliding mode loop filter

机译:使用离散时间滑模环路滤波器的数字锁相环设计

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Loop filter is an essential part of the phase locked loop. It removes the high frequency oscillations and generates the appropriate control signals for the voltage controlled oscillator. Besides it also reduces the effects of oscillator pulling and prevents injection locking. In this work the loop filter is designed using novel discrete time sliding mode controller design technique. A novel reaching law for continuous and discrete time systems has been proposed. The proposed reaching law uses exponential function in its gain term and has variable gain which is high when the states are away from the sliding manifold and reduces once the sliding phase starts. The stability of the proposed reaching law is proved using Lyapunov's method. The proposed reaching law also reduced the chattering at the control input and has been found suitable for the design of digital phase locked loops. Simulation results show significant reduction of chattering effect and better performance of the proposed sliding mode controller based phase locked loop.
机译:环路滤波器是锁相环的重要组成部分。它消除了高频振荡,并为压控振荡器产生了适当的控制信号。此外,它还减少了振荡器拉动的影响并防止了注入锁定。在这项工作中,使用新颖的离散时间滑模控制器设计技术设计了环路滤波器。提出了一种新颖的连续时间和离散时间系统的到达律。拟议的到达定律在其增益项中使用指数函数,并具有可变增益,该可变增益在状态远离滑动歧管时较高,并在滑动阶段开始时减小。利用李雅普诺夫方法证明了所提出的到达定律的稳定性。拟议的到达定律还减少了控制输入处的颤动,并且已发现适合于数字锁相环的设计。仿真结果表明,所提出的基于滑模控制器的锁相环大大降低了抖振效果,并具有更好的性能。

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