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Voltage scaling on C-elements: A speed, power and energy efficiency analysis

机译:C元件上的电压缩放:速度,功率和能效分析

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This work reports an evaluation of speed, energy consumption, leakage power, and silicon area tradeoffs of three different transistors topologies for C-elements, basic devices for building asynchronous circuits. The evaluation considers the devices operating under supply voltages that vary from nominal IV to 0.05V. Analog simulations provide precise measurements and the obtained results identify the lowest voltage at which each C-element operates correctly. Results suggest that operating at near-threshold voltages provides the best speed-energy and speed-leakage efficiencies. Also, they point the van Berkel topology as the most suited C-element implementation for low voltage operation, as it presents lower power and energy figures as well as higher speed, regardless of the supply voltage.
机译:这项工作报告了对三种用于C元素(构建异步电路的基本设备)的晶体管拓扑结构的速度,能耗,泄漏功率和硅面积折衷的评估。评估考虑了在额定IV至0.05V的电源电压下工作的器件。模拟仿真提供了精确的测量结果,获得的结果确定了每个C元件正常工作的最低电压。结果表明,在接近阈值电压下工作可提供最佳的速度能量和速度泄漏效率。而且,他们指出van Berkel拓扑是低电压操作最适合的C元素实现,因为无论电源电压如何,它都具有较低的功率和能量以及较高的速度。

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