Parallel and Multiplex Architecture of AES-CCM Coprocessor Implementation for IEEE 802.15.4

摘要

The MAC layer of 802.15.4 uses the AES-CCM protocol as security mechanism, it uses the AES algorithm as the core, uses CTR mode to ensure confidentiality of data, uses CBC-MAC mode to authenticate the public information of the header in MAC frame. This paper presents an AES hardware accelerator module and two implementations of AES-CCM coprocessor: one for high throughput with parallel AES module and one for low cost with multiplex AES module. For easy of integration and portability, the coprocessor uses Avalon bus interface standard, and it is verified on Alter a EP1CF324C6 FPGA platform. This design and implementation of the security coprocessor has a certain value for the generalization the wireless communication terminal hardware platform.