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Design of a programmable digital IIR filter based on FPGA

机译:基于FPGA的可编程数字IIR滤波器的设计

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FPGAs are increasingly being promoted in signal processing applications with their tractability, parallelism, high speed, and fast time-to-market. Digital filter is one of the important contents of digital signal process. The characteristic of frequency selection in lower order in comparison with FIR, IIR digital filter is widely applied in modern signal processing systems. Hardware description languages such as Verilog differ from software programming languages because their include ways of describing the propagation of time and signal dependencies (sensitivity). In this paper, architecture of a programmable digital IIR filter has been proposed based XILINX FPGA board. In this architecture gate level design has been used to analyze the impulse response of the IIR filter.
机译:凭借其易处理性,并行性,高速度和快速上市时间,FPGA正在信号处理应用中得到越来越多的推广。数字滤波器是数字信号处理的重要内容之一。与FIR相比,IIR数字滤波器具有较低的频率选择特性,在现代信号处理系统中得到了广泛的应用。诸如Verilog之类的硬件描述语言与软件编程语言不同,因为它们包括描述时间传播和信号依赖性(灵敏度)的方式。本文基于XILINX FPGA板提出了可编程数字IIR滤波器的架构。在该架构中,门级设计已用于分析IIR滤波器的脉冲响应。

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